Direct Sparse Linear Solver Suite for Mximal Performance FPGA/CPU Heterogeneous Supercomputing - An Enhancement to the Sca/LAPACKrc Library
Award amount
$100,000Program and phase
SBIR · Phase IAward year
2009Award details
- Awarding agency
- Department of Energy
- Branch
- Not reported
- Recipient company
- Accelogic, LLC
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- LJGLU5UUYEC8
- Solicitation number
- DE-PS02-08ER08-34
- Topic code
- 53 a
Research abstract
Technology keywords
Not reported
Other awards by this recipient
Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.
- Next-Generation TechNology for the Extremely Efficient Storage, Distribution, and Processing of Nuclear Physics Data
- Next-Generation Technology for the Extremely Efficient Storage, Distribution, and Processing of Nuclear Physics Data
- Industrial-quality acceleration of MDA’s missile defense simulation infrastructures —A novel theory of optimal data compression inspired on the OSF
- Industrial-Quality Porting of the Army's Helios CFD Code into Xeon-Phi-Enabled Systems —A Process-Based Approach for Maximal Speedup
- Enabling extreme acceleration of graph analytics in real-world applications
Awards with the same topic code
Verified by an exact topic code match. This is not a text-similarity match.
- Development of Mine Explosion Ground Truth Smart Sensors
- Development of Mine Explosion Ground Truth Smart Sensors
- Low Draft Temperature Sensor Gen-IV Simulation Test Planning and Hardware Development
- Mapping and Tracking Early Stage Damage and Damage Precursor Conditions
- Plasma Mass Separator for TRISO Fuel Recycling
Research funding history
25 SBIR/STTR records share this UEI (2005–2019). Reported award amounts total $10,682,952. Reported amounts are not federal obligations.
Phases: Phase I, Phase II
Agencies: Department of Energy, Department of Defense, National Aeronautics and Space Administration