SBIR Phase II: Vertical Electroabsorptive Modulated Laser (EML) Source for High-Speed Interconnects

This SBIR Phase II project aims to fabricate and commercialize a Vertical Electro-absorptive Modulated Laser (V-EML) for high-speed (up to 40Gbps) optical interconnects for chip-to-chip, board-to-board, and intra-rack optical applications. Compared to current electrical data buses using copper interconnects or conventional fiber optic links, the V-EML will enable the fabrication of higher speed, lower cost, lower power consumption and smaller optical transmitters for multi-channel fiber optic data buses in computer and communication networks. This technology virtually removes the modulation speed limit of VCSEL optical transmitters. At the same time it maintains high channel density at low cost. The low power consumption of the V-EML (~20 mW) and its potential low cost in volume (~$1.0) will provide a solution to the interconnect speed and power barriers in multiprocessor computers and servers. An array spacing of 50 to 100 microns will be possible with V-EMLs. This means that an 8x8 array with 2.5 Tbps of capacity has less than 1.0 mm2 of footprint. This offers substantial space savings over the existing copper interconnect technology and creates another strong incentive for transition. This technology could provide societal benefits from the commercialization of this technology by enabling faster and more widespread deployment of broadband services. The potential for ultra-fast delivery of audiovisual information is enormous as the V-EML technology helps to remove data-com bottlenecks. Educational and scientific benefits of the V-EML development arise in the area of supercomputers with sufficient computing power for complex scientific simulations. Applications include climate modeling for better predictions, molecular level modeling such as protein folding in medicine, ecosystem modeling in agriculture, and large-scale analysis of business information and economic statistics. These computers could then operate much faster and much more efficiently when interconnect speed limits are increased.