High Resolution, 15-micron thin, Pixellated, Back-illuminated SOI CMOS Vertex Sensor

Planned high energy physics (HEP) experiments require improvements in detector technology characterized by improved parameters for granularity, readout speed, radiation hardness and sensor thickness. Of the available detector technologies, Complementary Metal Oxide Semiconductor (CMOS) pixilated imagers offer several advantages, but CMOS detectors, due to readout and fixed pattern noise, have not been widely used for scientific instrumentation. They are also difficult to thin. The goal of this project is to overcome the limitations of contemporary SOI (silicon-on-insulator) CMOS active pixel sensor (APS) technology, in a 3-dimensional stacked imager configuration, by establishing a new class of back-thinned, radiation-hard, stacked Silicon on Insulator/ SOI CMOS HEP imagers. The Phase I project successfully fabricated and thinned photodetectors to the required specifications and uniformity. This addresses one of the major technical hurdles being addressed by the HEP detector community. The Phase II project will further investigate the technologies necessary to develop these high-performance detectors. Commercial Applications and other Benefits as described by the awardee: In the past, developments in HEP instrumentation have found widespread application in other fields. This project will open up a new approach to radiological imaging, protein crystallography, time resolved x-ray synchrotron science, electron microscopy, laser radar, and others.