Magnetoresistive Trimming for an Ultrafast Nonvolatile RAM

The proposer (IME) has applied giant magnetoresistance (GMR) to pioneer a novel method, called magnetoresistive trimming (MT), to balance GMR circuits resistively to an accuracy unmatchable with the presently used technique of laser trimming. Unlike lasertrimming, MT is reversible, can adjust the resistance continuously, can be automated, and uses very little chip area, The project objectives are (a) to develop fully the MT technique, and (b) to apply it to the development of an ultrafast all-metalrandom-access memory called PRAM1. The project will (1) develop the MT technique for general use by circuit designers; (2) design, fabricate and test an integrated 1 Kbit PRAM1 chip with trimmed GMR support circuitry; and (3) design a fully integrated 8Mbit PRAM1 chip. The results are anticipated to create sufficient MT data to allow circuit designers to apply this technique directly in any system where GMR electronics might find use. The level of memory-chip integration to be achieved using trimmed GMRcircuitry is expected to realize PRAM1 read and write times on the order of 10 ns and to cut the number of read pulses by half compared to that using a conventional sample-and-hold circuit.MT has the potential of becoming a niche industry by enablingpreviously impossible chip applications. Its use in memory-chip design will lead to an inherently radiation-hard, compact, ultrafast, random-access memory for military and commercial space-environment applications such as satellite communications.