High Dielectric Strength, Thin Gate Insulator for Semiconductor Electronics

The Physitron team (Physitron, Vanderbilt University, and Harris Semiconductor) will demonstrate the ability to integrate high quality ultra thin film diamond on silicon semiconductor as insulating dielectric on metal-insulator-semiconductor (MIS) capacitor structures. Successful completion of Phase I will lead to a candidate process by which polycrystalline chemical vapor deposition (CVD) diamond can be used to fabricated gate dielectric material markedly superior to the silicon dioxide (SiO2) currently used in the production of MOSFET technology. Harris, the team member providing semiconductor foundry support, has expressed a profound interest in this technology to enhance their product base for military and commercial space electronics. MIS capacitors will be designed, fabricated, packaged, and tested. Various ultra-thin interfacial layers and diamond deposition techniques will be employed to evaluate potential gate dielectrics with high resistivity and low density of charge trapping centers in the dielectric or at the interfaces. Evaluation criteria will include film grain size and thickness uniformity, metal adhesion, film-substrate adhesion and interfacial physical properties, capacitance-voltage (CV) characteristics, dielectric breakdown, interface state trapping centers, gate conductivity, resistance to single event gate rupture (SEGR), and response to ionizing dose.