Novel High Density Interconnects for Flexible Neural Prostheses

DESCRIPTION (provided by applicant): To make advanced neural stimulator implant devices such as the artifical retina a reality highly flexible minituarized devices with integrated microelectrode arrays for stimulation and integrated microelectronics are needed. Current prototype devices are still too bulky and have many shortcomings in packaging and interconnects to survive long-term in-vivo. One of the unresolved critical issues particularly for implanted neural prostheses with new flexible polymeric substrates is packaging, integration and connection of silicon chips with substrate and electrode arrays. The requirements for increased numbers of electrodes, increased miniaturization and use of new materials demands the development of new packaging methods for these micro size neural implants. We propose to develop a novel chip-to-flex substrate assembly technique which will reduce the size of the stimulator implant device substantially and improve the connectivity between flex substrate and electronic chip. In our approach we combine the advantages of direct processing of spin-on polyimides onto the whole surface areas of the wafer with the advantages of 3D integration or "Chip Stacking", which is being developed by our research institution partner RTI International. The polyimide substrate is chemically bonded to the wafer with no separation of chip and flex substrate through solder bumps or filler layers, all weak points in chronic implants. Protection is enhanced through deposition and encapsulation with our proprietary A-coat barrier films. Through-wafer interconnects allow 3-D stacking and high density connections to active 1C devices. By stacking and vertically integrating thin bare Si dies and passive components we can maintain or increase current processing power while maintaining or decreasing current size and weight of existing devices. Passive components like capacitors can be integrated into the circuitry and moved off the substrate. The thin chip package will be easier to seal using traditional polyimide processing techniques