Enhanced Architecture for Direct Digital Synthesizer (DDS) Designs

The proposed research is in the area of new architectures for a Direct Digital Synthesizer (DDS). Current DDS architecturs employ a phase acumulator, incremented each sample clock by a phase increment word. By controlling this word the rate (frequency) at which the accumulator overflows is controlled. The result is a stable programmable frequency source. The accumulator phase information is applied to a ROM in order to convert the phase information into a digitized in order to convert the phase information into a digitized sine waveform. The digitized wave is applied to a D/A converter and a low pass filter to generate the final waveform. Due to finite word lengths and the physical limitations of the architecture, phase and amplitude noise spurs are introduced during this process. Increasing the word lengths can reduce the noise spurs by about 6 db. per bit. What is proposes is two innovations that could reduce the noise spurs by more than 6db. per bit and thereby enhance the spectral purity of the generated waveform. To accomplish this the research proposes the use of: 1) New number systems with certain more desirable properties. 2) Approximation theory involving reduced computad computations.