SBIR/STTR Research Award
The Functional Prototyping System
Award amount
$69,504Program and phase
SBIR · Phase IAward year
1994Award details
- Awarding agency
- Department of Defense
- Branch
- Navy
- Recipient company
- Jrs Research Laboratorytori
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
The purpose of the proposed effort is to study the feasibility of and implement a very high performance simulation and prototyping tool for embedded, application specific processors. A major problem facing designers of highly stylized application specific processors for embedded military applications is that of rapidly prototyping and evaluating alternative designs with the objective of obtaining the best possible performance, within the mission constraints. Design automation tools currently exist that automatically synthesize application specific processors. A very high speed simulation tool is needed to augment these tools. In Phase I, a study and design effort would be performed to define the approach for applying Programmable Gate Array technology to this problem. It would evaluate technical issues concerning the simulation element-its capacity, costs, platforms, user interface, and interface to existing design automation tools. The effort would include the detailed evaluation of the PGA VME board for this purpose. In Phase II, a prototype system will be developed that clearly demonstrates the technology and is demonstrated in a real application selected by the Government.
Technology keywords
Not reported