Producibility of Higher-Density Avionics

Tessera Technologies will demonstrate the feasibility of applying stacked package and system-in-a-package designs to FPGA and RAM devices for single board systolic arrays for next generation missile defense. Working with Lockheed Martin, Tessera willdevelop a detailed system-in-a-package design for the FPGA and RAM combination properly configured for high density and functional connectivity to the systolic array architecture developed by Lockheed Martin. The design goal is to develop an array moduledesign that achieves a 4X increase in density over current planar designs. Electrical, thermal and physical simulations will be used to optimize the design for high reliability and performance. It is common for applications that employ FPGAs to alsorequire memory. There is growing interest from FPGA device suppliers and from electronics manufacturing suppliers for modular products that combine FPGA and memory. Full development of the FPGA plus memory module for this systolic array application willlay the groundwork for future standard product offerings able to penetrate military, medical, and communications markets. Compact FPGA plus RAM modules will find markets in image processing, sonar signal processing, portable ultrasound and other signalprocessing applications.