HIGH POWER MICROWAVE (HPM) INTEGRATED CIRCUIT SCREENING CRITERIA

THE OBJECTIVE OF THIS PROPOSAL EFFORT IS TO DEVELOP A SCREENING CRITERIAL OR CHIP DESIGN CRITERIA TO RESULT IN INTEGRATED CIRCUITS HARDENED TO HIGH POWER MICROWAVE EXPOSURE. THIS EFFORT WILL CONCENTRATE ON THE ANALYSIS AND STUDY OF FAILED DEVICES FURNISHED BY DOD. THE PROPOSED APPROACH TO GAIN A FUNDAMENTAL UNDERSTANDING OF THE FAILURE PROCESSES AND TO ACHIEVE HARDENED DEVICES WILL INCLUDE THE FOLLOWING: 1) DETERMINE THE NATURE OF THE FAILURE BY ELECTRICAL TEST; 2) DETERMINE THE LOCATION OF THE INDUCED DEFECTS BY DECAPSULATION AND INSPECTION BY HIGH POWERED OPTICAL MICROSCOPY AND SCANNING ELECTRON MICROSCOPY (SEM): 3) DETERMINE THE STRUCTURAL LOCATION TO SPECIFIC MASKING, DIFFUSION OR DEPOSITION LAYERS BY THE USE OF A COMBINATION OF ELECTRICAL TESTS, ETCH-BACKS OF LAYERS, AND MICROSCOPY TECHNIQUES; 4) DEDUCE POSSIBLE CAUSES OF THE SPECIFIC DEFECTS UTILIZING A KNOWLEDGE OF THE PHYSICAL STRUCTURE AND ELECTRICAL FUNCTION OF THE DEFECTIVE REGION; 5) VERIFY ACTUAL DEFECT PROCESS BY INDUCING FAILURES IN SIMILAR STRUCTURES; 6) DETERMINE THE CONDITIONS FOR TESTING WHICH WOULD STRESS THE DEVICE STRUCTURE IN QUESTION AND THOSE WHICH COULD BE USED FOR ELECTRICAL SCREENING FOR HPM HARDNESS; 7) DEDUCE CHANGE IN THE CHIP DESIGN OR MANUFACTURING PROCESS WHICH WOULD RESULT IN DEVICES LESS SUSCEPTIBLE TO HPM FLUENCE.