A GALLIUM ARSENIDE 16-BIT SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER WITH A 100 MEGAHERTZ CONVERSION RATE

HIGH SPEED (20 TO 200 MHZ), HIGH RESOLUTION (16+ BITS) ANALOG-TO-DIGITAL CONVERTERS (ADCS) CAN PERFORM AN IMPORTANT ROLE IN THE ELECTRONIC INSTRUMENTATION USED IN PARTICLE PHYSICS. GALLIUM ARSENIDE (GAAS) WOULD SEEM AN OPTIMUM TECHNOLOGY FOR THIS APPLICATION BECAUSE OF ITS INHERENT RADIATION TOLERANCE. HOWEVER, SOME OF ITS LIMITATIONS HAVE PREVENTED ITS USE IN ADCS THUS FAR. RECENTLY, SOME COMMERCIAL SILICON ADCS WITH RESOLUTIONS OF 12 TO 14 BITS HAVE BEEN INTRODUCED. MANY OF THESE ARE BASED ON SIGMA-DELTA ARCHITECTURES WHICH ARE CAPABLE OF ACHIEVING HIGH RESOLUTION USING ONLY LOW RESOLUTION (IN SOME CASES 1-BIT) FLASH CONVERTERS INTERNALLY, CIRCUMVENTING COMPARATOR OFFSET AND HYSTERESIS, A MAJOR STUMBLING BLOCK IN GAAS CONVERTERS. THUS, THE SIGMA-DELTA TECHNIQUE APPEARS TO BE A PROMISING APPROACH TO THE REALIZATION OF HIGH RESOLUTION, OVERSAMPLED ADCS USING GAAS. THE PURPOSE OF THIS RESEARCH IS TO EXPLORE THE FEASIBILITY OF AND TO DEVELOP A DESIGN FOR A 16-BIT ADC OPERATING AT CONVERSION RATES IN EXCESS OF 100 MHZ. PHASE I INCLUDES DEVELOPMENT OF A DESIGN FOR THE CONVERTER WITH CAREFUL CONSIDERATION GIVEN TO THE ADVANTAGES AND ANOMALIES ASSOCIATED WITH VARIOUS GAAS TECHNOLOGIES. THE DESIGN CONSISTS OF AN OPTIMUM COMBINATION OF ARCHITECTURE AND TECHNOLOGY. THE RESULTING DESIGN WILL BE FABRICATED DURING PHASE II.