5 NS ECL MEMORY MODULE USING POLYLITHICS MULTICHIP MODULES (MCM)

THE THIN FILM INTERCONNECT DESIGNED AND MANUFACTURED BY POLYLITHICS ALLOWS EXTREMELY TIGHT PACKAGING OF BARE INTEGRATED CIRCUIT DIE. DUE TO SHORT WIRE LENGTHS AND A CONTROLLED ELECTRICAL ENVIRONMENT, SIGNALS TRAVEL EFFICIENTLY BETWEEN CHIPS. WITH CHIP TO CHIP COMMUNICATION BOTTLENECKS ELIMINATED, POLYLITHICS MULTICHIP CIRCUITS OFFER DISTINCT PERFORMANCE ADVANTAGED OVER CONVENTIONAL PRINTED CIRCUIT BOARD IMPLEMENTATIONS. PROPRIETARY REACH THROUGH VIA TECHNIQUES (RTV) USING SEMICONDUCTOR PROCESSING CREATE DIRECT CONNECTIONS TO THE CHIP SURFACE WHICH CAN BE 100 TIMES SMALLER THAN CONVENTIONAL BONDING PADS. THIS FEATURE DRAMATICALLY INCREASES THE NUMBER OF POSSIBLE SIGNALS PER CHIP AND ALLOWS DESIGNERS TO BUILD MORE PARALLEL ARCHITECTURES THAT INCREASE SYSTEM PERFORMANCE. SINCE THE JOINTS FORMED BY THIS APPROACH SUBSTANTIALLY RESEMBLE INTERNAL THIN FILM CHIP VIAS IT ADDS TO THE RELIABILITY OF THE SYSTEM. POLYLITHICS DIE ATTACHMENT TECHNIQUES PROVIDE A THERMAL PATH THROUGH THE CHIP BACKSIDE TO A HEAT SINK TOTALLY INDEPENDENT OF THE INTERCONNECT STRUCTURE THUS NO COMPROMISE BETWEEN WIRING CHANNELS AND HEAT PATH ARE REQUIRED. THIS ALLOWS FOR OPTIMIZATION OF BOTH SIGNAL CHANNEL DENSITY AND DIE HEAT REMOVAL.