High Speed Digital Processing Electronics

In order to advance basic research in Nuclear Physics, development is needed of high speed digital processing electronics sampling with a large number of effective bits at rates > 4 GHz and a corresponding bandwidth, with minimal and repeatable integral and differential non-linearities. Such devices should have at a minimum 64 channels with fast timing (< 10 ps). Emphasis should be on low power dissipation and low cost per channel. We are proposing development of very high speed digital electronics sampling input signals with low noise and a large number of bits. The sampling frequency will be adjustable at run time from 1 to 6 GHz. Multiple boards will be synchronized to a common clock. The problem was addressed with a Sampling Capacitor Array provided with a dedicated application specific integrated circuit (ASIC) selected to address the stated problem. The resolution, nonlinearities, and timing synchronization were demonstrated to required precision. The hardware, firmware, and software serving the ASIC were evaluated to provide a solid basis for Phase II. The ASIC was found sufficient for development of Phase II prototypes. The ASIC will be used for designing sampling digitizers with sampling rates between 1 GHz and 6 GHz, adjustable at run time. Multiple boards will be synchronized to a common clock. The readout will be performend over Ethernet. Future applications will include nuclear physics, high energy physics, nuclear astrophysics, homeland security, and education. Public will benefit from our electronics helping fundamental research conducted at the National Laboratories and research institutions.