SBIR/STTR Research Award
HEMT and HBT Process Design
Award amount
$313,952Program and phase
SBIR · Phase IIAward year
1996Award details
- Awarding agency
- Department of Defense
- Branch
- Air Force
- Recipient company
- Gateway Modeling, Inc
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
This effort will address five problems in the process design of heterojunction bipolar transistors (HBTs) and high electron mobility transistors (HEMTs): (1) HEMT thermal impedances will be measured using a novel method and will be compared with finite-element simulations to provide more accurate values for computer-aided design programs. (2) The role of the spacer layer in HEMT performance and noise figures will be investigated. (3) HEMT source and drain resistances will be measured for a variety of spacings to assess different models and to determine critical resistance parameters. (4) Temperature-dependent large-signal device model parameters will be extracted for Wright Laboratory's thermal-shunted HBTs. (5) Room temperature model parameters will be extracted for a large number of HBTs in order to analyze HBT uniformity.
Technology keywords
Not reported