SBIR/STTR Research Award

JVD Nitride for Hi-Pwr Hi-Temp Elec Device

Award identifier 092b613ff8a4312d736a2038eb516ee646222c925a83f3428da26880543daba2Awarding agency Department of Defense · Air Force

Award amount

$748,903

Program and phase

SBIR · Phase II

Award year

1997

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Award details

Awarding agency
Department of Defense
Branch
Air Force
Recipient company
JET PROCESS CORP
Proposal award date
Not reported
Contract end date
Not reported
UEI
WN5MHCZRNB86
Solicitation number
Not reported
Topic code
Not reported

Research abstract

A number of wide bandgap semiconductors such as SiC, GaN, and diamond are being considered as the basis for the next generation of high-power and high-temperature electronics. SiC is the most promising materials for near term applications, since it shares many common features with Si processing and the recent advances in the growth of both bulk SiC crystals and epitaxial layers have made high quality materials available for in-depth studies of their electrical properties. Many military and commercial systems today are requiring high temperature electronics to run smaller system size at high performance level. Jet Process Corporation (JPC) has recently cooperated with Yale University on successful demonstration of high quality MNS capacitors, in which the silicon nitride layer is produced by Jet Vapor Deposition Process TM (JVD*TM) on silicon carbide substrates. Our MNS (Metal-SiN-SiC) capacitors show that JVD nitride can form a high quality inversion layer on the SiC surface with low density of fix charge, low current density and high breakdown voltage. JVD*TM is a patented, low cost, pollution free, and scalable process. In Phase I, we will deposit thin gate JVD nitride layers for MNS capacitors and MNSFETs on SiC to investigate the details of electrical performance at 350 degrees C and possible mechanism for high temperature operation, in order to establish an optimized JVD process for making high quality MNS devices and integrated circuits with high reproducibility, reliability, and testability. In Phase II, we will work with industry to design and fabricate prototype switching devices on SiC wafers to demonstrate the feasibility of JVD silicon nitride MNSFETs devices on SiC technology.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Research funding history

40 SBIR/STTR records share this UEI (1991–1998). Reported award amounts total $7,442,790. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense, National Science Foundation, Department of Energy, Environmental Protection Agency, National Aeronautics and Space Administration

Agency intelligence

Department of Defense

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