Radiation Tolerant System-On-A-Chip for Space

The purpose of this work is to identify/resolve deterrent factors to implement radiation tolerant image sensor system-on-a-chip (SOC). Thisis done by integrating radiation tolerant image sensor blocks on space system-on-a-chip (SOC) ICs that is expected tototal dose up to 1Mrad(Si). Photobit has recently completed an SBIR project that concluded that radiation hard CMOS APS image sensors are feasible. The combination of employing the physical design techniques of enclosed geometry and guard rings, and a deepsub-micron standard CMOS fabrication process provides the path to radiation hard CMOS APS image sensors SOC IC's. Along the way, it is necessary to develop and prove other system level blocks operating as an integral part of an imager SOC such as digitalcontrol blocks, data storage and communication blocks, etc.. In Phase I of this SBIR project, these blocks will be developed, simulated, and integrated with already developed CMOS APS image sensor blocks to construct radiation hard CMOS APS image sensorsystem-on-a-chip (SOC) for space applications. Final design will be made ready for submission for fabrication.Radiation hard CMOS APS image sensor system-on-a-chip (SOC) ICs will pave the way for low cost, radiation hard, low-power, miniature camerasolutions for space and earth based applications. CMOS APS image sensors perform as well as CCDs, with the added benefits of lower power (10 to 100 times less) and integration of electronics (enabling miniaturization and SOC solutions). This allows them tonot only compete in the same markets as CCDs, but also provide opportunities to expand the existing image sensor market. The proposed radiation hard image sensor and the technical advances associated with its development are extremely important for spaceapplications (DoD, NASA, and commercial satellites) and ground-based based radiation harsh environment systems such as nuclear power plants, particle accelerators, and radiation test facilities.