SBIR/STTR Research Award
High Performance (CMOS) Imagers with Robust On-Chip Processing
Award amount
$97,348Program and phase
SBIR · Phase IAward year
1997Award details
- Awarding agency
- Department of Defense
- Branch
- Army
- Recipient company
- Silicon Mountain Design, Inc.
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
High-speed large-format solid state imaging devices have been used for several years in a variety of scientific, industrial, and consumer applications. As the format size increases, however, the problem of post-capture processing becomes significantly larger, not only in terms of raw memory required but also in terms of processor throughput. Ideally, an imager capable of performing significant processing of the image on-chip, including analog-to-digital conversion but prior to storage, would greatly reduce the processor overhead and open up new applications heretofore unimagined. The imaging device structure proposed herein will provide this on-chip processing capability, as well as several other advantages over current imaging technologies which are detailed as well. Imaging areas which would benefit include all areas in which noisy or less-than-perfect images must be acquired and post-processed in order to extract useful information. Areas which would benefit from such an "intelligent" CMOS imaging include, but are not limited to, machine vision and inspection, surveillance; remote sensing, digital photography, X-ray medical imaging, and high-speed imaging in any noisy environment.
Technology keywords
Not reported