SBIR/STTR Research Award

SBIR Phase I: Machine-Learning Enabled Analog-to-Digital Converter

Award identifier 4c8bdcb9af77bced6de47ef0f1fc1497eed884e5ef63b2568ee9ee0a1a4c7ab8Awarding agency National Science Foundation

Award amount

$304,900

Program and phase

SBIR · Phase I

Award year

2025

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Award details

Awarding agency
National Science Foundation
Branch
Not reported
Recipient company
Magnolia Electronics
Proposal award date
2025-04-02
Contract end date
2025-09-30
UEI
HLTZEDJ8F423
Solicitation number
NSF 24-579
Topic code
S

Research abstract

The broader impact/commercial impacts of this Small Business Innovation Research (SBIR) Phase I project are in developing electronic components called analog to digital converters (ADCs). Physical phenomena like light waves exist in analog domain, whereas chip circuits require digital values. ADCs turn real world analog measurements into digital values that are used in computers. This project enhances scientific and technological understanding of the ADC process by demonstrating a new approach based on machine learning (ML). Computer models suggest that this new, patent-pending approach can measure much denser signals than traditional ADCs, meaning more information can be captured and processed. The first market opportunity will be computer chips that send data over networks, enabling faster data center and internet connections. The devices using this technology will have significant higher speeds and have cost advantages over traditional devices. The existing data center ADC market is close to $1 billion annually and growing. This Small Business Innovation Research (SBIR) Phase I project advances the design of ADCs. The ML ADC decomposes an analog signal into multiple channels, each containing only a portion of the signal’s total information. Each channel is sampled separately, slower than the input signal’s Nyquist rate, producing aliased and complicated digital outputs. A neural network, trained to approximate the inverse transfer function of the analog front-end, maps those digital outputs to the standard Shannon-Nyquist signal representation. This project implements one half of a common communication device, a Serializer/Deserializer receiver, using a ML ADC in printed circuit board prototype form. This project will examine the ability of the physical prototype to capture complete information in gigahertz-range pulse amplitude modulated (PAM) signals. This project expects to replicate computer simulations indicating high accuracy of the ML ADC when driven by a jittery and phase-drifting clock running below the Nyquist rate. The project will produce neural network models trained on the receiver’s data and report the error rates achieved by the models in decoding PAM-4 signals recorded by the receiver. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

Technology keywords

Not reported

Agency intelligence

National Science Foundation

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