SBIR/STTR Research Award
Low Noise, Large Capacity Photonic Frontend
Award amount
$363,538Program and phase
SBIR · Phase IIAward year
2003Award details
- Awarding agency
- Department of Defense
- Branch
- Defense Advanced Research Projects Agency
- Recipient company
- VISIDYNE, INC.
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
Under the Phase I effort, Visidyne through a process of analysis, modeling, and experimental verification arrived an innovative design for a Photonic analog-to-digital converter (P-ADC). The design has excellent prospects of improving on the performance,resolution of present day and future electronic ADCs by a factor from 2 to 3 bits at any sample rate with similar gains in reducing intermodulation distortions. The end product of the proposed Phase II effort would be a heterogeneous chip set, photonicsand analog/digital electronics, e.g., a multi-chip module (MCM) that would be suitable for integration into existing electronic systems, be highly compact and affordable.
Technology keywords
Not reported