Epitaxial SOI for Future Silicon Devices

NanoDynamics Inc. has produced an epitaxial barrier of barrier height over 0.5eV using a superlattice formation of silicon/adsorbed oxygen. The subsequent silicon growth beyond this SLB (Superlattice Barrier) is epitaxial of thickness ranging from 10nm togreater than 500nm. This phase I proposal will involve utilizing this SLB constructed of Si/O as a diffusion barrier for creating an improved SOI (Epi-SOI)buried insulating layer for future silicon device applications. This SLB in Si/O and/or Epi-SOI willbe applied to the construction of FETs and novel Dual Buried-gate FET device designs beneficial to BMDO as well as dual use for future technology applications . This technology has the potential to improve present CMOS applications.Improvements in presentSOI applications, as well as, FET device channel characteristics are anticipated to result from this research and development. Improved interfaces between semiconductor material and Insulating layers could enhance devices such as the FETs utilized inpresent day CMOS applications.