SBIR/STTR Research Award
A NOVEL MIXED-MODE DESIGN OF LFSR'S FOR VLSIC BUILT-IN SELF-TEST.
Award amount
$40,000Program and phase
SBIR · Phase IAward year
1987Award details
- Awarding agency
- National Science Foundation
- Branch
- Not reported
- Recipient company
- Computer Sciences Applications
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
THE USE OF LINEAR FEEDBACK SHIFT REGISTERS (LFSR) FOR PSEUDO-RANDOM STIMULI GENERATION AND RESPONSE COMPRESSION IN BUILT-IN SELF-TEST (BIST) IMPOSES CIRCUITRY AND INTERCONNECT OVERHEAD WHILE FAILING TO PROVIDE THOROUGH FAULT COVERAGE. COMPUTER SCIENCE APPLICATIONS, INC. PROPOSES TO INVESTIGATE THE USE OF A MIXED-MODE LFSR/SCAN-PATH TEST STRUCTURE IN CONJUNCTION WITH A TESTING TECHNIQUE IN ORDER TO PROVIDE GREATER EFFICIENCY AND INCREASED TEST EFFECTIVENESS. THEY WILL INVESTIGATE THE MATHEMATICAL IMPLICATIONS OF THOROUGHNESS OF THE GENERATED TEST PATTERN VERSUS AN EXHAUSTIVE SET, AND OF THE FAULT DETECTING ABILITY OF THE GENERATED SIGNATURE VERSUS ALIASING AND FAULT MASKING. THEY EXPECT THESE EFFECTS TO BE COMPARABLE TO THOSE ANTICIPATED FROM EFFECTIVELY DOUBLING THE LENGTH OF THE REGISTER. AFTER DEVELOPING THE OPTIMAL METHOD OF TEST APPLICATION AND THE FUNCTIONAL DEFINITION OF THE TEST STRUCTURE, THEY WILL EXPLORE THE PRACTICAL ASPECTS OF DESIGNING AND INTERCONNECTING A HARDWARE MACROCELL FOR USE WITHIN A DESIGN STYLE IN A FAMILY OF CHIPS INTENDED FOR A SPECIFIC APPLICATION.
Technology keywords
Not reported