SBIR/STTR Research Award
RADIATION-HARD VJFET DEVICES ON SOI SUBSTRATES
Award amount
$65,022Program and phase
SBIR · Phase IAward year
1989Award details
- Awarding agency
- Department of Defense
- Branch
- Air Force
- Recipient company
- Electro-optek Corp
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
MANY ADVANCED MICROCIRCUITS USED IN MILITARY SYSTEMS HAVE TO BE HIGH SPEED, LOW NOISE AND RADIATION HARD, PARTICULARLY RADIATION HARD AGAINST NEUTRON IRRADIATION. A PROPOSAL IS MADE FOR THE DEVELOPMENT OF AN INNOVATIVE TECHNOLOGY FOR FABRICATING V-GROOVED JUNCTION-FIELD-EFFECT TRANSISTOR (VJFET) AND MICROCIRCUITS ON SILICON-ON-INSULATOR (SOI) WAFERS TO MEET THESE ADVANCED REQUIREMENTS. THIS TECHNOLOGY USES MICROMACHINING TO FABRICATE MICRO V-GROOVES TO SUPPORT THE FORMATION OF JFET DEVICES HAVING SUBMICRON GATE LENGTHS AND SELF-ALIGNED GATE CONFIGURATIONS, RESULTING IN VJFET STRUCTURES WITH TIGHTLY-CONTROLLED SUBMICRON DIMENSIONS NECESSARY FOR VERY HIGH-SPEED, LOW NOISE AND RADIATION-HARD APPLICATIONS. THE SOI WAFER WILL ELIMINATE LATCH-UP EFFECTS, REDUCE NEUTRON-CAPTURE VOLUME AND PROVIDE ELECTRICAL ISOLATION FOR VJFET MICROCIRCUIT FABRICATION. THE RESULTANT VJFET IS HIGHLY DESIRABLE FOR FABRICATING VERY HIGH-SPEED (20 GIGAHZ) MICROCIRCUITS THAT MUST SURVIVE HIGH RADIATION (NATURAL OR INDUCED) ENVIRONMENTS. THE AIM OF PHASE I IS TO ESTABLISH A MODEL FOR THE VJFET AND TO DEFINE THE PROCESSES AND REQUIREMENTS FOR FABRICATING THE DESIRED SUBMICRON STRUCTURES.
Technology keywords
Not reported