SBIR/STTR Phase II: Mechanism of the Layer Transfer Process for Silicon-on-Insulator

This Small Business Innovations Research (SBIR) Phase II project builds on demonstrated and patented new hydrogenation-based processes for producing silicon-on-insulator (SOI) wafers for the semiconductor manufacturing industry. It has been demonstrated that this new techniques can be bonded for improved activation of the surfaces of silicon wafers. The innovation also serves to suppress layer transfer faults. The improvement in yield and the reduction in cost in the SOI production process have also been achieved. The process is expected to scale down to the formation of SOI surface films of thickness well below 0.1 micron. During Phase I, an RF plasma treatment was developed which optimizes the amount of adsorbed activating species on surfaces resulting in an improved layer transfer yield over previous wet chemical activation techniques. The process optimization was based on molecular dynamics simulation of the sub-monolayer hydroxylized surface. In Phase II the simulation-based process design continues with experimental characterization of the resulting probability of the layer transfer faults. The Phase II work plan includes more detailed process design and optimization leading to a characterization of best effort SOI wafers by the venture partners. The impact of the proposed commercialization activity on the existing $10B worldwide silicon starting-wafer industry is potentially huge. The increasing usage of SOI by the leading semiconductor manufacturers is optimistically projected to grow from 1% to 10% of the worldwide silicon market. If successful, a ramp up to commercialization SOI pilot production will begin immediately upon the completion of this Phase II contract