SBIR/STTR Research Award
MICROPROGRAMMED PROCESSORS
Award amount
$45,000Program and phase
SBIR · Phase IAward year
1983Award details
- Awarding agency
- National Aeronautics and Space Administration
- Branch
- Not reported
- Recipient company
- Jrs Research Laboratorytori
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
THE USE OF HOROZONTALLY MICROPROGRAMMED PROCESSORS FOR PERFORMANCE ADVANTAGES IS WELL KNOWN. THE ADVENT OF TOOLS FOR THE AUTOMATIC GENERATION AND OPTIMIZATION OF MICROCODE FOR THESE MICRO-ARCHITECTURES HAS RAISED THE QUESTION OF DESIGN ISSUES WHICH DIRECTLY CONTRIBUTE TO PERFORMANCE. IN PATICULAR, WITH THE DECREASING COST OF HARDWARE AND THE ABILITY TO MORE EASILY GENERATE MICROCODE, PERFORMANCE- ORIENTED PROCESSOR DEVELOPMENT IS BECOMING A SIGNIFICANT DESIGN PROBLEM. THE ISSUES OF CONCURRENCY, PARALLELISM, AND PROCESSING TASK DISTRIBUTION ARE OF SIGNIFICANT IMPORTANCE TO THE EVENTUAL PERFORMANCE CAPABILITY OF THESE MACHINES. THIS RESEARCH ADDRESSES APPROACHES FOR DETERMINING THE DESIGN GUIDELINES AND DESIGN PARAMETERS OF INTEREST IN EXPLOITING THESE PERFORMANCE CONCEPTS.
Technology keywords
Not reported