SBIR/STTR Research Award
MICROCOMPUTER-NETWORK ARCHITECTURE FOR RANGE INSTRUMENTATION APPLICATIONS
Award amount
$439,548Program and phase
SBIR · Phase IIAward year
1989Award details
- Awarding agency
- Department of Defense
- Branch
- Army
- Recipient company
- Mentor Technologies, Inc.
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
VLSI (VERY LARGE SCALE INTEGRATION) TECHNOLOGY HAS BEEN DEVELOPED TO THE POINT WHERE SPECIAL PURPOSE PROCESSORS MAY BE CONCATENATED TO FORM SUPERCOMPUTERS WITH FASTER THROUGHPUT RATES THAN UNI-PROCESSOR MACHINES. CHO, INC. PROPOSES TO DESIGN AND DEVELOP A MULTI-PROCESSOR COMPUTER ARCHITECTURE FOR REAL-TIME DIGITAL FILTERING OF MULTI-SENSOR TRACKING DATA. THE ARCHITECTURE WILL BE OPTIMIZED FOR IMPLEMENTATION OF THE DECENTRALIZED SQUARE ROOT INFORMATION FILTER (SRIF). PHASE I RESEARCH WILL DEMONSTRATE FEASIBILITY OF THE DECENTRALIZED SRIF AS A MEANS FOR SOLVING THE LINEAR LEAST SQUARES ESTIMATION PROBLEM IN DECENTRALIZED FORM. PHASE II RESEARCH WILL FOCUS UPON DEVELOPMENT AND TESTING OF A PROTOTYPE DEVICE.
Technology keywords
Not reported