SBIR/STTR Research Award
High Reliability Solid State Amplifier
Award amount
$79,073Program and phase
SBIR · Phase IAward year
1994Award details
- Awarding agency
- Department of Defense
- Branch
- Air Force
- Recipient company
- Comtech Corp
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
The long term objective is to develop a high reliability, cost competitive SSA for dual use in both DOD and commercial applications. The Phase I technical objective is to develop an innovative life test methodology and the associated theoretical model for investigation of semiconductor failure under overdrive conditions. This life test methodology is generic and it has broad applications to many different semiconductor devices including HBT, FET, PHEMT, and silicon BJT. An innovative device structure, the vacuum passivated T-gate FET, will be investigated to minimize the overdrive failure.
Technology keywords
Not reported