SBIR/STTR Research Award
Very High Speed Integrated Circuit (VHSIC) Hardware Descriptive Language (VHDL) Package Library/Common Packages
Award amount
$48,996Program and phase
SBIR · Phase IAward year
1993Award details
- Awarding agency
- Department of Defense
- Branch
- Army
- Recipient company
- Vhdl Technology Group
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
While there are already a number of packages available either in the public domain or commercially, there are numerous classifications of design techniques and areas in which additional VHDL packages would benefit the industry. These include: (a) Back-Annotation, (b) Math routines, (c) Floating-Point, (d) Digital Signal Processing Functions and (e) Abstract Queing. In phase I of the proposed work, a survey of the most needed packages will be conducted and a specification will be written to further develop the packages under Phase II. Therefore the goals are: 1. Develop an industry survey asking users to describe the features in any of the packages mentioned above and gain feedback on requirements for packages other than those identified based upon the industry's needs. 2. Develop a draft specification for each pakcage. In those cases where the functionality can be so well defined as to specify the procedural interfaces, this specification may be as detailed as a VHDL package declaration, or alternatively the specification may describe the subprograms and types needed in the abstract and leave the detailed design for Phase II. This effort will be accomplished in coordination with the efforts of the IEEE and the industry with the goal of providing VHDL packages not readily available elsewhere.
Technology keywords
Not reported