SBIR Phase I:High Performance Zero-Crossing Based A/D Converter Architectures

This SBIR Phase I research proposal will investigate new circuit architectures for high performance Analog-to-Digital (A/D) converters with potentially more than an order of magnitude lower power consumption and much smaller silicon area than conventional architectures. The new architectures are based on zero-crossing detectors. The zero-crossing based circuits utilize the virtual-ground based signal processing as in traditional op-amp based circuits. Therefore, they provide the same functionality and robustness and are compatible with most op-amp based circuit architectures. The zero-crossing detectors replace the virtual ground forcing function of the op-amp with virtual ground detection by a zero-crossing detector. The zero-crossing detector based circuits provide high speed operation at extremely low power consumption, are tiny in size, and are compatible with standard deep submicron Complementary Metal Oxide Semiconductors (CMOS) technologies. The proposed research, if successful, can have far reaching impact, because A/D converters are ubiquitous in electronics systems. The power consumption represents approximately thirty (30) fold reduction from the state-of-the art. It will provide high performance A/D converters built in deep submicron CMOS technologies thereby exploiting their very low cost, high-speed capability, tiny size, high level of integration, and low power digital circuits. These may include software-defined and cognitive radios, and portable phased array radios among many other possibilities. For military applications, Portable phased-array radars, battery-operated smart sensors (e.g. smart dust), micro-robots, and small unmanned aircrafts can benefit from the low power and tiny size/weight/volume of the proposed circuits.