SBIR/STTR Research Award
SBIR Phase I: VLSI Clocking Using BDS Technology
Award amount
$99,950Program and phase
SBIR · Phase IAward year
2007Award details
- Awarding agency
- National Science Foundation
- Branch
- Not reported
- Recipient company
- MHI Consulting LLC
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- NSF 06-598
- Topic code
- EL
Research abstract
This Small Business Innovation Research (SBIR) Phase I research project will validate the Bi-Directional Signaling (BDS) concept in Very Large Scale Integrated Circuits (VLSI) clock distribution applications. The BDS concept was introduced recently as an idea enabling a disruptive new technology for VLSI clocking with significant implications in the VLSI design methodology. Similar to other recent research ideas, BDS replaces the dissipative and noisy signal transport inherent in conventional active trees with electromagnetic wave propagation, accomplishing major reductions in power dissipation, jitter, and travel time. BDS is a wide-band, openloop (driven) system naturally supporting fast clock start/stop operations and a very wide range of clock frequencies. In addition, unlike any other VLSI clocking techniques, BDS decouples the signal transport function from the local-area loading effects for almost complete freedom in clock distribution routing. If the theoretical promises of BDS turn into reality and the VLSI chip manufactures adopt this technology, the significant benefits will include faster IC development cycles, lower IC cost, higher yields, and better performance.
Technology keywords
Not reported