SBIR Phase II: Non-Contact/Zero-Stress Surface Polishing Process for Copper/Low Dielectric Constant Semiconductors

This Small Business Innovation Research (SBIR) Phase II project will advance the development of a non-contact electro-polish process, addressing the need for a non-contact/stress-free polishing method for planarization of Cu/low-k interconnects required for the fabrication of nanochip integrated circuits. This technology utilizes pulsed electrolysis and a moving electrolyte front to effect complete electrochemical removal of copper overplate from a semiconductor wafer. The Phase II objectives/research tasks include: 1) design and fabrication of a module for the non-contact electro-polish process, 2) demonstration and optimization of the process on full size wafers, 3) development of a theoretical model defining a process library for the non-contact electro-polish process, and 4) characterization of the polishing performance and relationship to the mechanical properties of the materials used. Commercially, the anticipated results of the program are a marketable manufacturing process/manufacturing tool in the form of an electrochemical module incorporating the non-contact electro-polish process. This product/process technology is enabling to other emerging industries such as MEMS and/or NEMS. In general, the project addresses the needs of the semiconductor industry, which is an important aspect of the US commercial economy and will play an increasing role in the US as well as world society. Furthermore, the process minimizes chemical waste and environmental impact.