SIGE DELTA-SIGMA DECIMATION FILTER

PRESENT SILICON IC'S ARE REACHING FUNDAMENTAL LIMITS ON GAIN, SPEED, AND POWER DENSITY. HETEROJUNCTION DEVICES PROMISE TEN-FOLD PERFORMANCE IMPROVEMENTS BUT LARGE-SCALE IC'S ARE REQUIRED TO ASSESS THESE EMERGING TECHNOLOGIES. SIGE HETEROSTRUCTURES OFFER SUBSTANTIAL PERFORMANCE INCREASES WHILE COEXISTING WITH CURRENT PROCESSING AND PACKAGING TECHNOLOGY. SILICON SUBSTRATES ARE EASIER TO MANUFACTURE THAN GAAS OR INP SUBSTRATES. GE DOPING PROVIDES TEN TIMES THE PERFORMANCE OF SILICON HOMOJUNCTIONS. THUS, SIGE IC'S CAN BE MANUFACTURED RAPIDLY WITH RELATIVELY LOW COST. LARGE-SCALE IC'S WILL ASSESS SIGE'S PERFORMANCE, YIELD, AND POTENTIAL AS DROP-IN UPGRADES TO SILICON-ONLY SYSTEMS. Q-DOT PROPOSES A DELTA-SIGMA DECIMATION FILTER IC AS A PROCESS MONITOR. THE HIGH-SPEED FILTER CAN BE INITIALLY PARTITIONED INTO SMALLER, PIPELINED CHIPS BEFORE INTEGRATION INTO A SINGLE IC. THE PROCESS TECHNOLOGY AND CHIP DESIGN CAN EVOLVE TOGETHER, MINIMIZING THE OVERALL PROGRAM RISK WHILE PROVIDING USEFUL INTERMEDIATE IC'S FOR DETERMINIG LSI/VLSI YIELD AND RELIABILITY. SMALLER TEST CELLS UTILIZING HBT'S, FET'S, AND/OR RTD'S WILL PROVIDE HIGH-YIELDING PROCESS CHARACTERIZATION CELLS. Q-DOT CURRENTLY HAS A DELTA-SIGMA AND PROGRAM, PROVIDING IMMEDIATE SIGE TECHNOLOGY INSERTION. INITIAL FILTER AND CELL DESIGNS WILL BE PERFORMED DURING PHASE I. DURING PHASE II, FINAL DESIGN AND TEST OF THE FILTER AND APPROPRIATE TEST CELLS WILL BE PERFORMED. ANTICIPATED BENEFITS: THE PROPOSED FILTER WILL PROVIDE SMALL TEST CELLS TO ASSESS SIGE'S PERFORMANCE AND LARGE IC'S TO ASSESS LSI/VLSI YIELD AND RELIABILITY. IT ALSO FULFILLS AN IMMEDIATE NEED FOR A COMPLEX HIGH-SPEED DIGITAL IC. THE PROGRAM WILL PAVE THE WAY FOR HIGH-PERFORMANCE SIGE DROP-INS TO UPGRADE EXISTING AND FUTURE COMPUTERS, DIGIAL RECEIVERS, AND HIGH-SPEED LOGIC SYSTEMS.