SBIR/STTR Research Award
MCM DESIGN METHODOLOGY WITH MULTITECHNOLOGY FABRICATION TRADEOFFS
Award amount
$50,000Program and phase
SBIR · Phase IAward year
1991Award details
- Awarding agency
- Department of Defense
- Branch
- Defense Advanced Research Projects Agency
- Recipient company
- Innovative Configuration Inc
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
THE FEASIBILITY OF EXTENDING DESIGN/SYNTHESIS TOOLS FOR SINGLE COMPONENTS TO ENABLE "SEAMLESS" BOARD AND SYSTEM LEVEL PARTITIONING DESIGN IS INVESTIGATED. THE DESIGN PROCESS BEGINS WITH A VHDL (E.G., ANSI?IEEE 1076) BEHAVIORAL DESCRIPTION FROM WHICH SYSTEM PARITIONING ESTIMATES ARE GENERATED. THEN BOARD LEVEL LAYOUT IS UNDERTAKEN, THE DESIGN TOOLS BEING MINDFUL OF TESTING NEEDS (E.G., IEEE 1149 - BOUNDARY SCAN), SUBJECT TO THE SPECIFIC CHIPS TO BE USED. PACKAGING ALTERNATIVES INCLUDE DIRECT CHIP-ON-BOARD (COB), FLIP CHIP, AND TAB, AND ACCOUNT FOR ELECTRICAL THERMAL/VIBRATION ISSUES. THE PROPOSED SUITE OF TOOLS, BEGINNING WITH THIS COMPREHENSIVE DESIGN METHODOLOGY ARE IMPLEMENTED FOR A PARTICULAR CLASS OF COMPONENTS, NAMELY SEVERAL (E.G., 64) INTERCONNECTED, HIGH-SPEED (E.G., 67 MHZ) FIELD PROGRAMMABLE LOGIC ARRAYS (FPGAS) SUITABLE FOR BOTH GLUE LOGIC AND SUBSYSTEM LOGIC APPLICATIONS. THEN WE WILL EXTEND THIS METHODOLOGY TO INCORPORATE OTHER DIGITAL (E.G., CPU, RAM, ROM) AND ANALOG (E.G., A/D, D/A) CHIPS. ONE OF THE OUTPUTS OF THE PROPOSED TOOL KIT IS AN ASSEMBLY COMMAND SEQUENCE FILE FOR ICI'S UNIQUE PRECISION VISION-AIDED ROBOTIC (VAR) WORKCELL, WHICH CAN ASSEMBLE FINE PITCH (E.G., 6 MIL) COMPONENTS (E.G., FLIP CHIP, TAB) ON A VARIETY OF SUBSTRATES (E.G., KAPTON, SILICON, COPPER POLYAMIDE, CERAMIC). MOREOVER, THE AUTOMATED WORKCELL HAS THE POTENTIAL CAPABILITY OF PERFORMING SELECTIVE MECHANICAL (E.G., PULL) ELECTRICAL (E.G., RIC PROBE) AND VISUAL (E.G., SOLDER BRIDGING) TESTS ON THE ASSEMBLED MULTICHIP MODULES (MCM'S) DURING THE ASSEMBLY PROCESS. THUS THE PROPOSED TOOL KIT WILL PROVIDE A "DESIGN TO MANUFACTURING" CAPABILITY IN PHASE II. THE BENEFITS OF THIS FAMILY OF TOOLS WILL BE THE ABILITY TO RECURSIVELY EXERCISE THE TOOLS FOR AN AUGMENTED VHDL BEHAVIORAL DESCRIPTION AND EVENTUALLY CONVERGE ON A ROBUST HIGH PERFORMANCE ELECTRONIC SYSTEM DESIGN ACCOUNT FOR PERFORMANCE, MANUFACTURABILITY, AND COST TRADEOFFS ASSOCIATED WITH ALTERNATE IMPLEMENTATIONS OF MULTICHIP MODULE (MCM) BASED SYSTEMS, IN A SEAMLESS MANNER.
Technology keywords
Not reported