DEDICATED PERIPHERAL FOR ENHANCED MINIMUF EXCUTION DEVELOPMENT

THE MINIMUF ALGORITHM HAS BEEN USED VERY SUCCESSFULLY AS A PREDICTIVE TOOL FOR DETERMINING THE MUF OF AN HF CIRCUIT. THE ALGORITHM IS CURRENTLY IMPLEMENTED AS A BASIC PROGRAM. THE USEFULNESS OF THIS ALGORITHM WOULD BE GREATLY ENHANCED IF THE ALGORITHM COULD BE IMPLEMENTED SUCH THAT A TIME, FREQUENCY PAIR CALCULATION COULD BE COMPLETED IN 1 MS (GOAL). THIS PROPOSAL PRESENTS AN ANALYSIS AND PRELIMINARY HARDWARE AND SOFTWARE DESIGN TO ENHANCE THE SPEED OF THE MINIMUF ALGORITHM. THE APPROACH UTILIZES A DEDICATED PERIPHERAL CARD WHICH OCCUPIES AN EXPANSION SLOT OF AN IBM PC OR COMPATIBLE COMPUTER. THE HARDWARE UTILIZES AN 8086 MICROPROCESSOR AND AN 8087 MATH COPROCESSOR WITH THE SOFTWARE WRITTEN IN ASSEMBLY LANGUAGE. COMPUTATION SPEEDS APPROACHING 3 MS ARE EXPECTED USING THIS APPROACH.