A Demonstration of an Intelligent IO-to-N Interface

Today's network technologies easily reach 1 Gbit/sec bandwidths, but current IO board products based on these Gbit network technologies cannot harness that bandwidth. We have already developed an Intelligent IO-to-N (IION) interface. The IION interface allows any modern high-speed IO bus (e.g., PCI) to be interconnected to any modern Network protocol (e.g., SCI, Fibre Channel, ATM). The interface's onboard Intelligent hardware enables the IION board to deliver high delivered throughput, low latency, and flexible programming interfaces. Our IION board's architecture is unique because of the onboard intelligence that not only allows the board's configuration to be modified for specific IO buses, Network protocols, and new applications, but which incorporates new algorithms (which we have already invented) to increase its performance. For this effort, we propose to further the development of the IION architecture. First, we will build a complexity/cost/performance model of the IION architecture - this allows quick trade-off studies and rapid prototyping of new boards. Second, we will define a General-purpose Application Programming Interface - this enables general-purpose parallel programming in enterprise clustered workstation configurations. Third, we will demonstrate our existing IION board - this will show how the IION concept performs in the real world. Fourth, we will design an avionics-specific version of the IION board - this will demonstrate how the prior three results can be used to produce new variations of the IION board. At the end of Phase 1, we will be ready to begin the Phase 2 work of implementing the avionics-specific IION board.