A Communication System for Analog and Digital Neural VLSI Microchips and Boards

Future weapon systems require significant advances in computing systems' scale and functionality. Neural networks hold considerable promise to deliver very high performance and powerful new capabilities, as well as compact physical size, low power and high reliability. Such electronic neural networks are very attractive to system developers. To date, actual systems incorporating electronic neural networks have been limited (and expensive),due to a lack of flexibility in constructing custom network architectures with the available hardware modules. We propose to develop circuit techniques and design synthesis tools for simplifying the communication interface between application-specific neural network integrated circuits. This interface will exploit an address-event protocol, a recent invention of the Principal Investigator. This protocol permits analog or digital information to be efficiently transmitted from IC to IC, and solves a long- standing interface problem for richly-connected neural network architectures. In Phase I, we will prove the tools by FABRICATING demonstration circuits, building on existing Tanner Research commercial CAD tool technology. our approach will utilize commercial integrated circuit technology; products arising from this R&D can be fabricated reliably and economically by a number of vendors.