SBIR/STTR Research Award
Portable Optimizing Assembler for SIMD Instruction Sets
Award amount
$70,000Program and phase
SBIR · Phase IAward year
2002Award details
- Awarding agency
- Department of Defense
- Branch
- Missile Defense Agency
- Recipient company
- VANU, INC.
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
"This SBIR Phase I project will develop a compiler for a portablevector assembly language. This tool will allow portable low-levelprograms to be written for signal-processing applications, and willproduce efficient code for modern general-purpose processors (GPP),taking full advantage of their vector (SIMD) instruction sets such asSSE on the Intel Pentium and Altivec on the Motorola PowerPC. Thistool will reduce the software development time and cost, and reducethe hardware parts cost, for a variety of BMDO and commercial signalprocessing systems.GPPs with SIMD offer superior price/performance and MIPS/Watt/Volumecompared to any other COTS processors, but currently, programs thatexploit SIMD instructions must be explicitly targeted to a singleprocessor and are not portable.By restricting the problem domain to signal-processing algorithms, andby restricting the portable source language carefully, we expect thecompiler developed in this project to output code competitive withhand-written SIMD assembly code. The large software engineeringimprovements that come from eliminating hand-written assembly code,and the reduction in hardware costs due to running efficient code onGPPs, give this compiler significant commercial potential for use bydevelopers of radio communications systems, medical devices, audiosystems, and other signal processing applications. BMDO applications that could potentially benefit from this compilerinclude signal pro
Technology keywords
Not reported