SBIR/STTR Research Award

Reconfigurable Task Processor

Award identifier 9e78a19610ac635f3b032696fc7d20c44b8ff89df64aae0dfed2b555e654154cAwarding agency National Aeronautics and Space Administration

Award amount

$69,809

Program and phase

SBIR · Phase I

Award year

2003

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Award details

Awarding agency
National Aeronautics and Space Administration
Branch
Not reported
Recipient company
PicoDyne, Inc.
Proposal award date
Not reported
Contract end date
Not reported
UEI
Not reported
Solicitation number
Not reported
Topic code
Not reported

Research abstract

The work proposed herein is the development of a Radiation Tolerant Processing node with built-in reconfigurable logic and standard interfaces. Microelectronics for Nanosats require efficient architectures to make the best use of precious area, power, and mass allocations. PicoDyne is currently developing a Radiation Tolerant FPGA for space use, and separately, microcontrollers and processors. We propose combining the functions of a software-programmable processor with programmable hardware on a single chip. The FPGA architecture we are implementing as a stand-alone chip will be scaled down to allow insertion onto this Reconfigurable Task Processor(RTP). The same commercial design tools used for the larger device will be applicable here.

Technology keywords

Not reported

Agency intelligence

National Aeronautics and Space Administration

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