SBIR/STTR Research Award
A HIGH-PERFORMANCE DISK CONTROLLER FOR THE FASTBUS
Award amount
$500,000Program and phase
SBIR · Phase IIAward year
1988Award details
- Awarding agency
- Department of Energy
- Branch
- Not reported
- Recipient company
- Dvp, Inc.
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
THE FASTBUS IS A STANDARDIZED, HIGH-PERFORMANCE 32-BIT BUS USED IN DATA ACQUISITION AND DISTRIBUTED PROCESSING SYSTEMS. THERE ARE CURRENTLY SEVERAL MANUFACTURERS WHO ARE BUILDING BOARDS THAT ARE COMPATIBLE WITH THE FASTBUS AND USEMANY OF THE POSSIBLE FEATURES. ADDITIONALLY, R&D IS CONTINUING IN PRIVATE INDUSTRY, UNIVERSITIES, AND THE GOVERNMENT TO SUPPORT THE FASTBUS STANDARD FOR VARIOUS NEW LOGIC MODULES. ONE MAJOR AREA THAT IS NOT RECEIVING SUPPORT, HOWEVER, IS THE INTERFACING OF MASS STORAGE DEVICES (SUCH AS WINCHESTER, OPTICAL, FLOPPY DISKS, OR TAPES) DIRECTLY TO THE FASTBUS. THE PROJECT WILL INVOLVE EXAMINING SEVERAL OF THE CURRENT MASS STORAGE DEVICE INTERFACING REQUIREMENTS FOR APPLICABILITY TO THE FASTBUS, AFTER WHICH THE THROUGHPUT AND PROTOCOL REQUIREMENTS OF THE FASTBUS WILL BE MATED WITH THE SPECIAL INTERFACE NEEDS OF COMMERCIAL OFF-THE-SHELF STORAGE DEVICES. TO ASCERTAIN THE FEASIBILITY OF THE PROPOSED RESEARCH, SPECIAL CAPABILITIES OF THE FASTBUS, SUCH AS MULTIPROCESSING, HIGH-SPEED BURST MODE TRANSFERS, AND PHYSICAL AND LOGICAL STORAGE ADDRESSING WILL BE CONSIDERED IN THE DESIGN OF THE FLEXIBLE,HIGH-PERFORMANCE FASTBUS DISK CONTROLLER MODULE. IT IS FORESEEN THAT THE PROPOSED MODULE WILL OFFER AN ORDER-OF-MAGNITUDE INCREASE IN PERFORMANCE OVER CURRENT DISK INTERFACE TECHNIQUES.
Technology keywords
Not reported