Residual Stress/fracture Modeling Of HTSC Films

High quality thin films of high temperature superconductor (HTSC) materials have been grown by a variety of methods. Independent of the growth method, residual stresses in large area HTSC/dielectric multi-layer films, resulting from both thermal expansion and lattice mismatch, continue to be a problem. In Phase I, ATM, working with Dr. Stewart Kurtz of Pennsylvania State University, will calculate residual stress in the HTSC films using a three dimensional model based on the Voronoi tesselation method, which Dr. Kurtz has applied to the analysis of residual stress in multilayer capacitor structures with great success. Local stress distributions in the HTSC films will be predicted as a function of texture, grain size (to the limit of single crystal growth), layer thickness, directional thermla expansion coefficient, and material physical constants. Interlayer and intralayer fracture can then be predicted from analysis of local stress distributions. In Phase II the model will be refines as a computationsl tool and applied to the HTSC multichip module fabrication problem. As appropriate, a wider range material systems and more complex device geometrics (including vias and trenches) will be examined. HTSC/multilayer structures will be grown, residual stresses measured and corrected with the predictions of the model. ANTICIPATED BENEFITS: Residual stress/delamination continues to be a major concern of many commercial thin film coating processes. Computational models which can predict conditions leading to delamination or handling problems will save large sums of money spent on emprical development studies.