In-Line Real Time Wafer Level Monitoring Techniques

We propose to research in-line real time wafer level monitoring techniques for use in development of new semiconductor processes and for the monitoring of semiconductor process equipment and techniques as a process control function. All of these techniques will monitor actual reliability failure mechanisms not indirect performance criteria. All will minimize the processing necessary between the actual process step in question and the ability to accomplish the required reliability test. This program will concentrate on tests that can be performed with existing test equipment and probing techniques.