SBIR/STTR Research Award
DESIGN STUDY TO IMPLEMENT NASTRAN ON MASSIVELY PARALLEL COMPUTERS
Award amount
$47,734Program and phase
SBIR · Phase IAward year
1991Award details
- Awarding agency
- National Aeronautics and Space Administration
- Branch
- Not reported
- Recipient company
- Rpk Corp
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
THE FINITE-ELEMENT APPROACH TO STRUCTURAL ANALYSIS HAS BEEN CONSIDERED EFFICIENT AND COMPREHENSIVE FOR MANY YEARS. THE NASA-DEVELOPED STRUCTURAL ANALYSIS PROGRAM NASTRAN IS IN THE FOREFRONT FOR USE IN SUCH ANALYSES. IN THIS PROJECT, A DESIGN THAT WOULD ALLOW NASTRAN TO WORK EFFICIENTLY ON COMPUTERS THAT HAVE A MASSIVELY PARALLEL ARCHITECTURE WILL BE STUDIED. THE EFFORT WILL INCLUDE AN ANALYSIS OF THE CAPABILITIES OF EXISTING COMPUTERS WITH A MASSIVELY PARALLEL ARCHITECTURE, DETERMINATION OF EFFICIENT MATRIX ALGORITHMS, DETERMINATION OF AREAS OF CODE THAT COULD BE EXECUTED IN PARALLEL, DETERMINATION OF POSSIBLE PARALLELIZATION AT THE NASTRAN COMMAND LANGUAGE LEVEL, AND A DEFINITION OF THE ADDITIONAL NASTRAN I/O FUNCTIONS AND EXECUTIVE CONTROL FUNCTIONS REQUIRED TO INSTALL OPTIMAL PARALLELIZATION TECHNIQUES. THE FINITE-ELEMENT APPROACH TO STRUCTURAL ANALYSIS HAS BEEN CONSIDERED EFFICIENT AND COMPREHENSIVE FOR MANY YEARS. THE NASA-DEVELOPED STRUCTURAL ANALYSIS PROGRAM NASTRAN IS IN THE FOREFRONT FOR USE IN SUCH ANALYSES. IN THIS PROJECT, A DESIGN THAT WOULD ALLOW NASTRAN TO WORK EFFICIENTLY ON COMPUTERS THAT HAVE A MASSIVELY PARALLEL ARCHITECTURE WILL BE STUDIED. THE EFFORT WILL INCLUDE AN ANALYSIS OF THE CAPABILITIES OF EXISTING COMPUTERS WITH A MASSIVELY PARALLEL ARCHITECTURE, DETERMINATION OF EFFICIENT MATRIX ALGORITHMS, DETERMINATION OF AREAS OF CODE THAT COULD BE EXECUTED IN PARALLEL, DETERMINATION OF POSSIBLE PARALLELIZATION AT THE NASTRAN COMMAND LANGUAGE LEVEL, AND A DEFINITION OF THE ADDITIONAL NASTRAN I/O FUNCTIONS AND EXECUTIVE CONTROL FUNCTIONS REQUIRED TO INSTALL OPTIMAL PARALLELIZATION TECHNIQUES.
Technology keywords
Not reported