SBIR/STTR Research Award

INTELLIGENT INPUT/OUTPUT SUBSYSTEM FOR CAMAC AND FASTBUS

Award identifier 8f3bad5370c769592937dd389860437d12858fad034bb6d7420077ba9ced053cAwarding agency National Science Foundation

Award amount

$183,000

Program and phase

SBIR · Phase II

Award year

1987

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Award details

Awarding agency
National Science Foundation
Branch
Not reported
Recipient company
Aeon Systems Inc.
Proposal award date
Not reported
Contract end date
Not reported
UEI
Not reported
Solicitation number
Not reported
Topic code
Not reported

Research abstract

A MODULAR INPUT/OUTPUT SUBSYSTEM IS PROPOSED TO PROVIDE INTERFACE BETWEEN EXPERIMENTAL DATA ACQUISITION SYSTEMS USING THE CAMAC OR FASTBUS STANDARDS AND NEW-GENERATION DIGITAL EQUIPMENT CORPORATION MINICOMPUTERS. THE SYSTEM OFFERS A POTENTIAL TENFOLD INCREASE IN THE SPEED OF DATA ACQUISITION OVER CURRENT SYSTEMS. IT INCLUDES SUFFICIENT COMPUTER INTELLIGENCE TO MANAGE DATA TRANSFERS BETWEEN THE EXPERIMENT AND COMPUTER WITH MINIMUM INTERVENTION BY THE COMPUTER'S CENTRAL PROCESSOR. THE PROPOSED SYSTEM TAKES ADVANTAGE OF NEW INTERFACE BUS TECHNOLOGY TO PROVIDE WIDE BANDWIDTH COMMUNICATIONS AND REAL-TIME DATA PROCESSING CAPABILITY. DUE TO A UNIQUE RELATIONSHIP BETWEEN PROPOSER AND DEC, THE PROPOSED SYSTEM IS BELIEVED TO BE UNIQUE. THISPROPOSAL INCLUDES PRELIMINARY HARDWARE AND SOFTWARE DESIGN OF THE WHOLE SYSTEM AND OF ONE OF THE SYSTEM MODULES.

Technology keywords

Not reported

Agency intelligence

National Science Foundation

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