VERY LARGE SCALE INTEGRATION TIME INTERVAL UNITS

CONSTRUCTION OF CUSTOM VERY LARGE SCALE INTEGRATION (VLSI) CIRCUITS COMBINING ANALOG AND DIGITAL SECTIONS FOR A PRE-AMPLIFIER, DISCRIMINATOR, ENABLE GATE, AND TIME-TO-DIGITAL CONVERTER (TDC) TO FORM A FULLY MONOLITHIC TIME INTERVAL UNIT (TIU) IS THE PROPOSED INNOVATION. THIS TIU WILL DRAMATICALLY REDUCE THE SIZE, WEIGHT, AND POWER CONSUMPTION OF NASA SPACE-BASED LASER ALTIMETERS. ADDITIONAL ADVANTAGES OF THIS APPROACH ARE IMPROVED RELIABILITY AND PERFORMANCE AT REDUCED COST RELATIVE TO PRINTED CIRCUIT BOARD (PCB) AND HYBRID ALTERNATIVES. THE PHASE I PROGRAM WILL CONCENTRATE ON DESIGN AND TESTING OF INDIVIDUAL AND INDEPENDENT SUB-SECTIONS OF THE TIU; THESE RESULTS WILL BE COMBINED IN PHASE II TO PRODUCE A COMPLETE TIU CHIP OPTIMIZED FOR USE IN FLIGHT RATED RANGE-FINDING SYSTEMS. BASED ON OUR PREVIOUS VLSI AND PCB-LEVEL DESIGN EXPERIENCE, WE EXPECT BETTER THAN 1 NS RESOLUTION FROM THE SEGMENTED VLSI TEST PART FROM PHASE I. REFINED TIUS PRODUCED IN PHASES II AND III SHOULD DELIVER 100 PICOSECOND ACCURACY WITH CONVERSION TIMES LESS THAN 30 NS.