MICROWAVE OP AMPS FOR PICOSECOND INTEGRATORS

SEVERAL CANDIDATE CIRCUITS ARE PROPOSED FOR MICROWAVE OP AMPS, BASED ON PRELIMINARY DEMONSTRATIONS OF CONCEPT FEASIBILITY USING DISCRETE SILICON DEVICES. A HYBRID APPROACH EMPLOYING A SILICON IC INPUT STAGE WITH A GAAS MESFET OUTPUT STAGE IS SHOWN TO BE THE MOST PROMISING IN ACHIEVING THE DESIGN GOALS OF A STABLE, COMPENSATED, LOW NOISE, LOW DRIFT, DC-10GHZ OP AMP WITH 25V/NS SLEW RATE, 60DB VOLTAGE GAIN BELOW 10MHZ WITH A 50 OHMS LOAD, 50K OHMS + .5PF INPUT IMPEDANCE, 70DB COMMON MODE REJECTION, AND + OR - 1.5V MINIMUM INPUT AND OUTPUT RANGE. THE PHASE SHIFT AND TOPOLOGY WILL PERMIT STABLE RESISTIVE AND CAPACITIVE FEEDBACK AT MICROWAVE FREQUENCIES. THE OP AMP WILL BE PARTICULARLY WELL SUITED FOR INTEGRATOR APPLICATIONS WITH RISE TIME BELOW 300PS.