SCANNING TUNNELING MICROSCOPY ETCHING OF NANOMETER SCALE INTEGRATED CIRCUITS

PRESENT METHODS UTILIZED FOR THE FABRICATION OF INTEGRATED CIRCUITS ARE BASED ON MICROLITHOGRAPHY, EITHER OPTICAL, X-RAY, ELECTRON BEAM, OR ION BEAM. THESE METHODS ARE SIGNIFICANTLY LIMITED IN THE PRODUCTION OF SMALLER SCALE FEATURES (E.G., NANOLITHOGRAPHY), BY THE WAVELENGTH OF THE RADIATION (OPTICAL AND X-RAY LITHOGRAPHY) AND/OR BY THE COMPLEXITY AND COST OF THE EQUIPMENT (X-RAY AND ELECTRON AND ION BEAM LITHOGRAPHY). THE SCANNING TUNNELING MICROSCOPE (STM), HAS BEEN USED TO IMAGE SURFACES WITH ATOMIC RESOLUTION. THE ABILITY OF STM TO FUNC-TION OUTSIDE ULATRA-HIGH VACUUM CONDITIONS RAISES THE POSSIBILITY OF BROADENING THE RANGE OF APPLICATION TO AREAS OTHER THEN IMAGING. THE FEASIBILITY IS BEING INVESTIGATED OF USING STM TO SELECTIVELY MODIFY THE SURFACE OF A SUBSTRATE ON THE NANOMETER LEVEL IN ORDER TO REPLACE BOTH THE MICROLITHOGRAPHY MASKING STEP AND THE CHEMICAL ETCHING SET IN THE FABRICATION PROCESS. SPECIFIC EXPERIMENTS ARE BEING UNDERTAKEN TO ATTEMPT TO ETCH A GAAS SUBSTRATE WITH THE STM IN AN ACIDIC AND IN AN ALKALINE SOLUTION. THE ETCHED PORTION OF THE GAAS IS BEING CHARACTERIZED WITH STM AND SCANNING ELECTRON MICROSCOPY (SEM). SIGNIFICANT POTENTIAL ADVANTAGES OF NANOMETER ETCHING OF GAAS ARE THE INCREASED SPEED (SMALLER FEATURES OF AN INTEGRATED CIRCUIT RESULT IN FASTER DEVICES) AND A DECREASE IN THE AMOUNT OF MATERIAL, AND THEREFORE PRICE, REQUIRED FOR THE INTEGRATED CIRCUIT.