SBIR Phase I: IC Yield and Quality Improvement thru Test Data Analysis

This Small Business Innovation Research Phase I research project is focused on improving the yield and quality of integrated circuits (ICs) thru information extraction from test measurement data. Yielding reliable, working integrated circuits (ICs) is becoming significantly more difficult as fabrication technology moves towards structures with even smaller and smaller dimensions. As a result, the traditional testing task of determining if every manufactured IC is correct and reliable is also growing in importance. But beyond its traditional sort function, test has to become a major feedback mechanism for improving yield and quality. Standard practices involving in-line inspection, wafer-level test structures, and physical failure analysis are losing effectiveness and must be augmented with new methodologies that mine IC test measurement data for critical information that enable improvements in both yield and quality. This proposal plans to maximize knowledge extraction from IC test data by extending the patent-pending, state-of-the-art test and diagnosis methodologies to cope with more complex failure mechanisms and the increasing complexity of modern ICs. The broad impact of the research proposed here centers on continuing the advancement of the $250B U.S. semiconductor industry. There is significant commercial opportunity in supplying test data analysis on a per-design basis to both Integrated Device Manufacturers and fabless design houses that enables them to improve yield and quality through feedback from IC testing. Manufacturers will use this information to fine-tune their fabrication processes to maximize yield and performance, and optimize their test methodologies to ensure quality meets customer demands.