HIGH SPEED PROFILING OF MULTICHIP MODULE INTERCONNECTIONS

AS THE COMPLEXITY AND FUNCTIONALITY OF MICROELECTRONIC COMPONENTS INCREASED, STANDARD PACKAGING AND INTERCONNECTION TECHNOLOGIES LIMIT THE DEVELOPMENT OF ELECTRONIC SYSTEMS. TO INCREASE THE DENSITY OF ELECTRONIC COMPONENTS, NEW TECHNIQUES SUCH AS FLIP-CHIP BONDING HAVE BEEN DESIGNED TO ALLOW MULTI-CHIP MODULES. THIS PACKAGING TECHNIQUE IS CURRENTLY LIMITED BY THE YIELD AND RELIABILITY OF THE ELECTRICAL CONTACTS. MISREGISTRATION AND MALFORMED ELECTRICAL CONTACTS ARE PROBABLE WHEN THE NUMBER OF CONTACTS CAN EXCEED SEVERAL HUNDRED PER DIE. IN THIS PROGRAM WE PROPOSE TO INVESTIGATE AND DEVELOP A SYSTEMTO DETECT AND REPAIR DEFECTIVE ELECTRICAL CONTACTS ON FLIP-CHIPS BEFORE BONDING OCCURS. USING A HIGH-SPEED, LASER-BASED, POINT RANGE SENSORAND A HIGH-SPEED PART TRANSPORT SYSTEM, CRITICAL DIMENSIONAL CHARACTERISTICS OF THE ELECTRICAL CONTACTS CAN BE MEASURED. USING THIS DATE, DEFECTIVE CONTACTS CAN BE IDENTIFIED, REPAIRED OR REPLACED. IN PHASE I OF THIS PROGRAM, WE WILL DEFINE DEFECTS WHICH LIMIT THE BONDING PROCESS, DESIGN AND FABRICATE AN OPTIMIZED HEIGHT SENSOR, DEVELOP ALGORITHMS TO DETERMINE DEFECTIVE CONTACTS AND DESIGN A PROTOTYPE SYSTEM FOR INSPECTING AND REPAIR FLIP-CHIP DIE. PHASE II OF THIS PROGRAM WILL FABRICATE THE INSPECTION AND REPAIR SYSTEM AND INSTALL THE SYSTEM ON A FABRICATION LINE. ANTICIPATED BENEFITS/POTENTIAL COMMERCIAL APPLICATIONS - SUCCESSFUL DEVELOPMENT OF AN INSPECTION AND REPAIR STATION FOR ELECTRICAL CONTACTS ON FLIP-CHIP DIE WILL SIGNIFICANTLY INCREASE THE YIELD AND RELIABILITY OF THIS TYPE OF PACKAGING TECHNIQUE. COUPLED WITH THE INCREASE IN YIELD WILL BE A DECREASE IN COST OF THE TECHNIQUE MAKING MULTICHIP PACKAGING TECHNIQUE AVAILABLE FOR A WIDE RANGE OF APPLICATIONS IN SIGNAL PROCESSING, COMMUNICATIONS, IMAGE DETECTION AND COMPUTING.