SBIR/STTR Research Award
Hierarchical Design Methodologies for High Availability Systems
Award amount
$97,738Program and phase
SBIR · Phase IAward year
1996Award details
- Awarding agency
- Department of Defense
- Branch
- Defense Advanced Research Projects Agency
- Recipient company
- Reliable Computer Technology
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
To meet dependability requirements dictated by current trends in both defense and commercial technologies, massive modular redundancy and application specific designs will have to give way to more efficient, scalable and cost-effective approaches. This Phase I proposal introduces a method which takes a basic architectural approach to fault-tolerant system design. The proposed research will address techniques which improve the reliability of large, heterogeneous, distributed systems consisting of both fixed and mobile computing nodes. This approach will offer a hierarchical recovery scheme which begins recovery at the chip/board level and ranges through the node and network levels. Proposed research will allow a range of systems to be designed and built using commercial off-the-shelf (COTS) technology; system design and implementation will be kept cost-effective, while also allowing versatility of design.
Technology keywords
Not reported