Quantum Secure Identification

The goals of this TACFI proposal are twofold. First, we plan to demonstrate that ourQPUF design is able to produce the expected performance over time, fab andpackaging variations, storage and operating environment conditions. Second, weexpect to show our QPUF design’s robustness to active machine-learning-based EMI,environmental and physical attacks.Fabricating, packaging and testing many rounds of chips takes a great deal of time.Each fab cycle represents a 6-month interval from sending the chip to the fab andgetting first samples back. After the packaged chips arrive in our labs, the actualbench testing can require from one to several weeks, depending on the depth andbreadth of the attack model. We will overlap testing and design where possible.However, we have a more effective means at our disposal to accelerate the massiveamount of testing required for this program. Using our partners at the Darwin Deason Institute for Cyber Security at SMU, we can leverage a multi-million-dollar, state-of-the-art hardware lab for ML testing (SMU’s Cyber Autonomy Range). This facility is supported by government and commercial grants and it contains one of the mostadvanced ML labs in the country. Using this facility, we will be able to test our designmuch more rapidly using accelerated testing of the QPUF models against simulatedattackers in a virtual environment. This “virtual testing” facility will allow us tosimulate advanced ML-based attacks on our QPUF design faster than in real-time byat least an order of magnitude. Thus, we can potentially simulate multiple decades ofML-assisted cyberattacks over the course of only a couple of years.At the same time, we plan to build multiple generations of devices in two differentfabs. These facilities include our current fab (AIM Photonics) as well as HoneywellAerospace -a commercial fab facility with extensive experience in building devicesfor in-orbit applications. We will test these multiple hundreds of parts against oursimulation models and adjust the models as necessary to better match the fabricated parts. Then, we can re-run our simulations, if necessary, in order to update our results.This TACFI fulfills AFRL’s mission to transfer research to the warfighter. We plan toadvance from ~TRL 3 to ~TRL 6 in this program. Acceptance criteria are tied to theQPUF’s intended mission. If these chips are used in applications where powerconsumption is critical, such as battlefield drones, then those results will be weightedmore than the raw performance. If the QPUFs are destined for networked data centerapplications, then performance is more critical than the power-saving aspects. TheAnametric QPUF design is highly modular and scales well to both extremes. Finally,the underlying (Silicon-on-Insulator or SOI) fabrication technology makes this kind ofdesign inherently less susceptible to radiation damage, providing a highly suitableplatform for space-based applications.