SBIR/STTR Research Award
Solid State Electronics Directorate Applied Research
Award amount
$1,449,871Program and phase
SBIR · Phase IIAward year
1995Award details
- Awarding agency
- Department of Defense
- Branch
- Air Force
- Recipient company
- MTL SYSTEMS, INC.
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
MTL Systems, Inc. proposes to develop a standard analyzer and intermediate form (IF), called SAVANT for the DoD standard hardware description language VHDL. This standard is necessary for the widespread realization of electronic CAD tools in industrial, government, and educational institutions, and will allow designers to exploit a broad range of tools from many CAD vendors. Furthermore, evolutionary advanced in CAD tools whose interfaces conform to this standard can be integrated into existing design processes. Access to such a design environment will enable more efficient electronic designs in a fraction of the time currently required. SAVANT will be composed of several components. First, SAVANT will define a standard IF to store digital system designs. In addition, SAVANT will include an Analyzer and tools to translate VHDL into the IF, store the IF to a file, and read a file producing the IF. The Phase I objectives are to (1) establish the technical and commercialization feasibility of SAVANT, (2) establish community acceptance for it, and (3) produce preliminary design concepts for the Analyzer and IF. Ultimately, the IF will be proposed for balloting as a DASC standard, and the source code for the Analyzer will be placed in the public domain.
Technology keywords
Not reported